bugAVR C Runtime Library - Bugs: bug #35368, Incorrect PCIE/PCIF bit...


bug #35368: Incorrect PCIE/PCIF bit definitions for the ATMEGA169P

Submitted by:  Dean Camera <abcminiuser>
Submitted on:  Wed 25 Jan 2012 02:37:37 PM UTC  
Category: HeaderSeverity: 3 - Normal
Priority: 5 - NormalItem Group: None
Status: InvalidPercent Complete: 0%
Assigned to: NoneOpen/Closed: Closed
Release: 1.8.0Fixed Release: None

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Thu 26 Jan 2012 06:49:36 PM UTC, comment #1:

My mistake; the MEGA169P has an unusual register structure for these bits compared to the MEGA169A and MEGA169PA. This report can be closed.

Dean Camera <abcminiuser>
Wed 25 Jan 2012 02:37:37 PM UTC, original submission:

The header file for the ATMEGA169P contains several errors relating to the EIFR and EIMSK registers. According to the datasheet, PCIF0/PCIE0 to PCIF3/PCIE3 are located in bits 4-7 of the EIFR and EIMSK registers. In the latest AVR Toolchain 3.3.1 version, these definitions are listed as:

/* External Interrupt Flag Register */
#define EIFR _SFR_IO8(0x1C)
#define PCIF1 7
#define PCIF0 6

/* External Interrupt Mask Register */
#define EIMSK _SFR_IO8(0x1D)
#define PCIE1 7
#define PCIE0 6

I.e. PCIE2/PCIF2 and PCIE3/PCIF3 are missing, and the existing bits are in the incorrect register locations (bits 6/7 instead of 4/5). These values are correct in the non-P version of the ATMEGA169 device headers.

Dean Camera <abcminiuser>


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  • -unavailable- added by arcanum (Updated the item)
  • -unavailable- added by abcminiuser (Submitted the item)

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    Date Changed By Updated Field Previous Value => Replaced By
    Fri 16 Nov 2012 06:48:48 PM UTCarcanumStatusNone=>Invalid

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