bugAVR C Runtime Library - Bugs: bug #35368, Incorrect PCIE/PCIF bit...

 
 

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bug #35368: Incorrect PCIE/PCIF bit definitions for the ATMEGA169P

Submitter:  Dean Camera <abcminiuser>
Submitted:  Wed 25 Jan 2012 02:37:37 PM UTC
   
 
Category:  Header Severity:  3 - Normal
Priority:  5 - Normal Item Group:  None
Status:  Invalid Assigned to:  None
Percent Complete:  0% Open/Closed:  Closed
Release:  1.8.0 Fixed Release:  None

Thu 26 Jan 2012 06:49:36 PM UTC, comment #1: 

My mistake; the MEGA169P has an unusual register structure for these bits compared to the MEGA169A and MEGA169PA. This report can be closed.

Dean Camera <abcminiuser>
Wed 25 Jan 2012 02:37:37 PM UTC, original submission:  

The header file for the ATMEGA169P contains several errors relating to the EIFR and EIMSK registers. According to the datasheet, PCIF0/PCIE0 to PCIF3/PCIE3 are located in bits 4-7 of the EIFR and EIMSK registers. In the latest AVR Toolchain 3.3.1 version, these definitions are listed as:

/* External Interrupt Flag Register */
#define EIFR _SFR_IO8(0x1C)
#define PCIF1 7
#define PCIF0 6

/* External Interrupt Mask Register */
#define EIMSK _SFR_IO8(0x1D)
#define PCIE1 7
#define PCIE0 6

I.e. PCIE2/PCIF2 and PCIE3/PCIF3 are missing, and the existing bits are in the incorrect register locations (bits 6/7 instead of 4/5). These values are correct in the non-P version of the ATMEGA169 device headers.

Dean Camera <abcminiuser>

 

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Carbon-Copy List
  • -email is unavailable- added by arcanum (Updated the item)
  • -email is unavailable- added by abcminiuser (Submitted the item)
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    Follow 2 latest changes.

    Date Changed by Updated Field Previous Value => Replaced by
    2012-11-16 arcanum StatusNone Invalid
        Open/ClosedOpen Closed

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