µracoli Manual
Version foo
µracoli
User Guide
Reference Guide
at86rf230b.h
1
/* THIS FILE IS GENERATED by ds2reg.py FROM INPUT Templates/at86rf230b.txt */
2
3
/* Copyright (c) 2008 Axel Wachtler
4
All rights reserved.
5
6
Redistribution and use in source and binary forms, with or without
7
modification, are permitted provided that the following conditions
8
are met:
9
10
* Redistributions of source code must retain the above copyright
11
notice, this list of conditions and the following disclaimer.
12
* Redistributions in binary form must reproduce the above copyright
13
notice, this list of conditions and the following disclaimer in the
14
documentation and/or other materials provided with the distribution.
15
* Neither the name of the authors nor the names of its contributors
16
may be used to endorse or promote products derived from this software
17
without specific prior written permission.
18
19
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
POSSIBILITY OF SUCH DAMAGE. */
30
31
/* $Id$ */
36
#ifndef AT86RF230B_H
37
#define AT86RF230B_H (1)
38
39
/* === Includes ============================================================== */
40
41
/* === Externals ============================================================= */
42
43
/* === Types ================================================================= */
44
45
typedef
uint8_t
trx_ramaddr_t
;
46
typedef
uint8_t
trx_regval_t
;
47
typedef
uint8_t
trx_regaddr_t
;
48
49
/* === Macros ================================================================ */
51
#define RG_TRX_STATUS (0x1)
52
53
#define SR_CCA_DONE 0x1,0x80,7
54
55
#define SR_CCA_STATUS 0x1,0x40,6
56
57
#define SR_TRX_STATUS 0x1,0x1f,0
58
#ifndef P_ON
59
#define P_ON (0)
60
#endif
/* P_ON */
61
#ifndef BUSY_RX
62
#define BUSY_RX (1)
63
#endif
/* BUSY_RX */
64
#ifndef BUSY_TX
65
#define BUSY_TX (2)
66
#endif
/* BUSY_TX */
67
#ifndef RX_ON
68
#define RX_ON (6)
69
#endif
/* RX_ON */
70
#ifndef TRX_OFF
71
#define TRX_OFF (8)
72
#endif
/* TRX_OFF */
73
#ifndef PLL_ON
74
#define PLL_ON (9)
75
#endif
/* PLL_ON */
76
#ifndef TRX_SLEEP
77
#define TRX_SLEEP (15)
78
#endif
/* TRX_SLEEP */
79
#ifndef BUSY_RX_AACK
80
#define BUSY_RX_AACK (17)
81
#endif
/* BUSY_RX_AACK */
82
#ifndef BUSY_TX_ARET
83
#define BUSY_TX_ARET (18)
84
#endif
/* BUSY_TX_ARET */
85
#ifndef RX_AACK_ON
86
#define RX_AACK_ON (22)
87
#endif
/* RX_AACK_ON */
88
#ifndef TX_ARET_ON
89
#define TX_ARET_ON (25)
90
#endif
/* TX_ARET_ON */
91
#ifndef RX_ON_NOCLK
92
#define RX_ON_NOCLK (28)
93
#endif
/* RX_ON_NOCLK */
94
#ifndef RX_AACK_ON_NOCLK
95
#define RX_AACK_ON_NOCLK (29)
96
#endif
/* RX_AACK_ON_NOCLK */
97
#ifndef BUSY_RX_AACK_NOCLK
98
#define BUSY_RX_AACK_NOCLK (30)
99
#endif
/* BUSY_RX_AACK_NOCLK */
100
101
#define RG_TRX_STATE (0x2)
102
103
#define SR_TRAC_STATUS 0x2,0xe0,5
104
#ifndef TRAC_SUCCESS
105
#define TRAC_SUCCESS (0)
106
#endif
/* TRAC_SUCCESS */
107
#ifndef TRAC_SUCCESS_DATA_PENDING
108
#define TRAC_SUCCESS_DATA_PENDING (1)
109
#endif
/* TRAC_SUCCESS_DATA_PENDING */
110
#ifndef TRAC_CHANNEL_ACCESS_FAILURE
111
#define TRAC_CHANNEL_ACCESS_FAILURE (3)
112
#endif
/* TRAC_CHANNEL_ACCESS_FAILURE */
113
#ifndef TRAC_NO_ACK
114
#define TRAC_NO_ACK (5)
115
#endif
/* TRAC_NO_ACK */
116
#ifndef TRAC_INVALID
117
#define TRAC_INVALID (7)
118
#endif
/* TRAC_INVALID */
119
120
#define SR_TRX_CMD 0x2,0x1f,0
121
#ifndef CMD_NOP
122
#define CMD_NOP (0)
123
#endif
/* CMD_NOP */
124
#ifndef CMD_TX_START
125
#define CMD_TX_START (2)
126
#endif
/* CMD_TX_START */
127
#ifndef CMD_FORCE_TRX_OFF
128
#define CMD_FORCE_TRX_OFF (3)
129
#endif
/* CMD_FORCE_TRX_OFF */
130
#ifndef CMD_RX_ON
131
#define CMD_RX_ON (6)
132
#endif
/* CMD_RX_ON */
133
#ifndef CMD_TRX_OFF
134
#define CMD_TRX_OFF (8)
135
#endif
/* CMD_TRX_OFF */
136
#ifndef CMD_PLL_ON
137
#define CMD_PLL_ON (9)
138
#endif
/* CMD_PLL_ON */
139
#ifndef CMD_RX_AACK_ON
140
#define CMD_RX_AACK_ON (22)
141
#endif
/* CMD_RX_AACK_ON */
142
#ifndef CMD_TX_ARET_ON
143
#define CMD_TX_ARET_ON (25)
144
#endif
/* CMD_TX_ARET_ON */
145
146
#define RG_TRX_CTRL_0 (0x3)
147
148
#define SR_PAD_IO 0x3,0xc0,6
149
150
#define SR_PAD_IO_CLKM 0x3,0x30,4
151
#ifndef CLKM_2mA
152
#define CLKM_2mA (0)
153
#endif
/* CLKM_2mA */
154
#ifndef CLKM_4mA
155
#define CLKM_4mA (1)
156
#endif
/* CLKM_4mA */
157
#ifndef CLKM_6mA
158
#define CLKM_6mA (2)
159
#endif
/* CLKM_6mA */
160
#ifndef CLKM_8mA
161
#define CLKM_8mA (3)
162
#endif
/* CLKM_8mA */
163
164
#define SR_CLKM_SHA_SEL 0x3,0x8,3
165
166
#define SR_CLKM_CTRL 0x3,0x7,0
167
#ifndef CLKM_no_clock
168
#define CLKM_no_clock (0)
169
#endif
/* CLKM_no_clock */
170
#ifndef CLKM_1MHz
171
#define CLKM_1MHz (1)
172
#endif
/* CLKM_1MHz */
173
#ifndef CLKM_2MHz
174
#define CLKM_2MHz (2)
175
#endif
/* CLKM_2MHz */
176
#ifndef CLKM_4MHz
177
#define CLKM_4MHz (3)
178
#endif
/* CLKM_4MHz */
179
#ifndef CLKM_8MHz
180
#define CLKM_8MHz (4)
181
#endif
/* CLKM_8MHz */
182
#ifndef CLKM_16MHz
183
#define CLKM_16MHz (5)
184
#endif
/* CLKM_16MHz */
185
186
#define RG_PHY_TX_PWR (0x5)
187
188
#define SR_TX_AUTO_CRC_ON 0x5,0x80,7
189
190
#define SR_TX_PWR 0x5,0xf,0
191
192
#define RG_PHY_RSSI (0x6)
193
194
#define SR_RX_CRC_VALID 0x6,0x80,7
195
196
#define SR_RSSI 0x6,0x1f,0
197
198
#define RG_PHY_ED_LEVEL (0x7)
199
200
#define SR_ED_LEVEL 0x7,0xff,0
201
202
#define RG_PHY_CC_CCA (0x8)
203
204
#define SR_CCA_REQUEST 0x8,0x80,7
205
206
#define SR_CCA_MODE 0x8,0x60,5
207
208
#define SR_CHANNEL 0x8,0x1f,0
209
210
#define RG_CCA_THRES (0x9)
211
212
#define SR_CCA_ED_THRES 0x9,0xf,0
213
214
#define RG_IRQ_MASK (0xe)
215
216
#define SR_MASK_BAT_LOW 0xe,0x80,7
217
218
#define SR_MASK_TRX_UR 0xe,0x40,6
219
220
#define SR_MASK_TRX_END 0xe,0x8,3
221
222
#define SR_MASK_TRX_START 0xe,0x4,2
223
224
#define SR_MASK_PLL_LOCK 0xe,0x1,0
225
226
#define SR_MASK_PLL_UNLOCK 0xe,0x2,1
227
228
#define RG_IRQ_STATUS (0xf)
229
230
#define SR_BAT_LOW 0xf,0x80,7
231
232
#define SR_TRX_UR 0xf,0x40,6
233
234
#define SR_RX_END 0xf,0x8,3
235
236
#define SR_RX_START 0xf,0x4,2
237
238
#define SR_PLL_LOCK 0xf,0x1,0
239
240
#define SR_PLL_UNLOCK 0xf,0x2,1
241
242
#define RG_VREG_CTRL (0x10)
243
244
#define SR_AVREG_EXT 0x10,0x80,7
245
246
#define SR_AVDD_OK 0x10,0x40,6
247
248
#define SR_DVREG_EXT 0x10,0x8,3
249
250
#define SR_DVDD_OK 0x10,0x4,2
251
252
#define RG_BATMON (0x11)
253
254
#define SR_BATMON_OK 0x11,0x20,5
255
256
#define SR_BATMON_HR 0x11,0x10,4
257
258
#define SR_BATMON_VTH 0x11,0xf,0
259
260
#define RG_XOSC_CTRL (0x12)
261
262
#define SR_XTAL_MODE 0x12,0xf0,4
263
264
#define SR_XTAL_TRIM 0x12,0xf,0
265
266
#define RG_PLL_CF (0x1a)
267
268
#define SR_PLL_CF_START 0x1a,0x80,7
269
270
#define RG_PLL_DCU (0x1b)
271
272
#define SR_PLL_DCU_START 0x1b,0x80,7
273
274
#define RG_PART_NUM (0x1c)
275
276
#define SR_PART_NUM 0x1c,0xff,0
277
#ifndef RF230B_PART_NUM
278
#define RF230B_PART_NUM (2)
279
#endif
/* RF230B_PART_NUM */
280
281
#define RG_VERSION_NUM (0x1d)
282
283
#define SR_VERSION_NUM 0x1d,0xff,0
284
#ifndef RF230B_VERSION_NUM
285
#define RF230B_VERSION_NUM (2)
286
#endif
/* RF230B_VERSION_NUM */
287
288
#define RG_MAN_ID_0 (0x1e)
289
290
#define SR_MAN_ID_0 0x1e,0xff,0
291
292
#define RG_MAN_ID_1 (0x1f)
293
294
#define SR_MAN_ID_1 0x1f,0xff,0
295
296
#define RG_SHORT_ADDR_0 (0x20)
297
298
#define SR_SHORT_ADDR_0 0x20,0xff,0
299
300
#define RG_SHORT_ADDR_1 (0x21)
301
302
#define SR_SHORT_ADDR_1 0x21,0xff,0
303
304
#define RG_PAN_ID_0 (0x22)
305
306
#define SR_PAN_ID_0 0x22,0xff,0
307
308
#define RG_PAN_ID_1 (0x23)
309
310
#define SR_PAN_ID_1 0x23,0xff,0
311
312
#define RG_IEEE_ADDR_0 (0x24)
313
314
#define SR_IEEE_ADDR_0 0x24,0xff,0
315
316
#define RG_IEEE_ADDR_1 (0x25)
317
318
#define SR_IEEE_ADDR_1 0x25,0xff,0
319
320
#define RG_IEEE_ADDR_2 (0x26)
321
322
#define SR_IEEE_ADDR_2 0x26,0xff,0
323
324
#define RG_IEEE_ADDR_3 (0x27)
325
326
#define SR_IEEE_ADDR_3 0x27,0xff,0
327
328
#define RG_IEEE_ADDR_4 (0x28)
329
330
#define SR_IEEE_ADDR_4 0x28,0xff,0
331
332
#define RG_IEEE_ADDR_5 (0x29)
333
334
#define SR_IEEE_ADDR_5 0x29,0xff,0
335
336
#define RG_IEEE_ADDR_6 (0x2a)
337
338
#define SR_IEEE_ADDR_6 0x2a,0xff,0
339
340
#define RG_IEEE_ADDR_7 (0x2b)
341
342
#define SR_IEEE_ADDR_7 0x2b,0xff,0
343
344
#define RG_XAH_CTRL (0x2c)
345
346
#define SR_MAX_FRAME_RETRIES 0x2c,0xf0,4
347
348
#define SR_MAX_CSMA_RETRIES 0x2c,0xe,1
349
350
#define RG_CSMA_SEED_0 (0x2d)
351
352
#define SR_CSMA_SEED_0 0x2d,0xff,0
353
354
#define RG_CSMA_SEED_1 (0x2e)
355
356
#define SR_MIN_BE 0x2e,0xc0,6
357
358
#define SR_AACK_SET_PD 0x2e,0x20,5
359
360
#define SR_AACK_I_AM_COORD 0x2e,0x8,3
361
362
#define SR_CSMA_SEED_1 0x2e,0x7,0
363
364
#define RADIO_NAME "AT86RF230B"
365
366
#define RADIO_PART_NUM (RF230B_PART_NUM)
367
368
#define RADIO_VERSION_NUM (RF230B_VERSION_NUM)
369
371
#define TRX_CMD_RW (_BV(7) | _BV(6))
372
373
#define TRX_CMD_RR (_BV(7))
374
375
#define TRX_CMD_FW (_BV(6) | _BV(5))
376
377
#define TRX_CMD_FR (_BV(5))
378
379
#define TRX_CMD_SW (_BV(6))
380
381
#define TRX_CMD_SR (0)
382
383
#define TRX_CMD_RADDR_MASK (0x3f)
384
386
#define TRX_RESET_TIME_US (6)
387
389
#define TRX_INIT_TIME_US (510)
390
392
#define TRX_PLL_LOCK_TIME_US (180)
393
395
#define TRX_CCA_TIME_US (140)
396
398
#define TRX_IRQ_PLL_LOCK _BV(0)
399
401
#define TRX_IRQ_PLL_UNLOCK _BV(1)
402
404
#define TRX_IRQ_RX_START _BV(2)
405
407
#define TRX_IRQ_TRX_END _BV(3)
408
410
#define TRX_IRQ_UR _BV(6)
411
413
#define TRX_IRQ_BAT_LOW _BV(7)
414
415
416
418
#define TRX_MIN_CHANNEL (11)
419
421
#define TRX_MAX_CHANNEL (26)
422
424
#define TRX_NB_CHANNELS (16)
425
430
#define TRX_SUPPORTED_CHANNELS (0x7fff800UL)
431
432
#define TRX_SUPPORTS_BAND_2400 (1)
433
438
#define TRX_SUPPORTED_PAGES (42)
439
440
442
#define TRX_OQPSK250 (0)
443
445
#define TRX_NONE (255)
446
447
#endif
/* ifndef AT86RF230B_H */
trx_regaddr_t
uint8_t trx_regaddr_t
Definition:
transceiver.h:89
trx_regval_t
uint8_t trx_regval_t
Definition:
transceiver.h:85
trx_ramaddr_t
uint8_t trx_ramaddr_t
Definition:
transceiver.h:81
install
inc
at86rf230b.h
Generated on Sat Aug 29 2015 08:07:13 for µracoli Manual by
1.8.10