mainverilator - Verilog to SystemC - Summary

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Group identification
Id: #176
System Name: verilator
Name: verilator - Verilog to SystemC
Group Type: non-GNU software and documentation

This project is not part of the GNU Project.

Verilator is a GNU licenced program to compile Verilog RTL code to fast C++ and/or SystemC code.

Registration Date: Fri 04 May 2001 05:59:08 PM UTC
License: GNU Lesser General Public License
Development Status: 5 - Production/Stable


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